Year-end Sale % OFF 
Abstract
An analytical model of hole confinement gate voltage range is derived for SiGe-channel p-MOSFETs and verified by SEDAN-3 simulation. The hole confinement gate voltage range is shown to be a function of threshold voltage, gate oxide thickness to Si cap thickness ratio, gate material, and Ge mole fraction. Si cap should be thinned with device scaling and power supply decreasing to keep the same hole confinement so as to realise full bias range SiGe-channel operation. It is clarified that various bulk and SIO SiGe p-MOSFETs have the same hole confinement under the same threshold voltage.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
