Modeling of gate-all-around charge trapping SONOS memory cells

Abstract

In this work we present an investigation on the program, erase and retention mechanisms of cylindrical gate-all-around charge-trapping memories. The numerical model accounts for the tunnel injection of electrons and holes from the channel and the gate into the silicon nitride layer; for carrier transport, capture and emission within the nitride, and allows for both planar and cylindrical geometries. Simulations of the programming transient are validated against experimental data taken over an extended range of program voltages and times. The retention property in the programmed state is found to be a sensitive function of the trap energy in the nitride bandgap. Instead, retention in the erased state mainly depends on the ability of the gate oxide to withstand electron tunneling, and is thus a sensitive function of the gate voltage. The erasing process in the investigated cell is made much more complicated than programming and retention due to the interaction between hole generation mechanisms in the nanowire (mainly by impact ionization) and hole injection into the nitride layer.