Modeling of drain leakage current in SOI pMOSFETs

Abstract

In this paper we present a compact drain leakage current model for fully-depleted (FD) SOI pMOSFETs. The analytical and physics-based model was developed using a quasi-two dimensional approach, in which the longitudinal and vertical surface channel electric fields can be calculated. It can be used to accurately calculate drain leakage current as a function of drain and gate biases. This model in conjunction with our previous published subthreshold and above threshold model forms a concrete drain current model for FD SOI pMOSFET operation in off and on states.