Abstract

Defect generation was usually predicted by using the V/G (where V is growth rate and G is axial temperature gradient at the interface of melt/solid) theory, but it was hard to get appropriate critical V/G value and the value could not show the distribution of grown-in defects. Otherwise, direct defect simulation is a very useful method of interpreting initial point defect behavior and micro void generation. In this research, the direct defect simulation was preformed with variable process parameters and optimized by comparing with experiment results. With optimized direct defect analysis, the critical V/G value was modified as 0.00155 cm2 min-1 K-1. The critical pulling rate range was defined as that has low residual point defect concentration in silicon crystal, thus a high-quality wafer can be obtained at the critical pulling rate. The initial point defect distribution and the critical pulling rate range were analyzed by using direct defect model. Additionally, the generation of micro void density was also calculated with variable pulling rates and compared with experiment results. In this research, the initial point defect incorporation and the tendency of micro void generation were well explained by using direct defect model.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call