Modeling of DC and AC NBTI Degradation and Recovery for SiON and HKMG MOSFETs

Abstract

In this chapter, a comprehensive model is proposed to describe NBTI degradation in SiON and HKMG p-MOSFETs. The model is based on the physical mechanism of NBTI established in earlier chapters, has mutually uncorrelated trap generation and trapping subcomponents, and can predict ultra-fast measured stress and recovery data under DC and AC stress. Time evolution of NBTI degradation and recovery during and after DC stress as well as during multiple DC stress and recovery cycles for different stress bias, temperature and recovery bias can be successfully explained. The model can explain time evolution of AC degradation for different pulse frequency, duty cycle, and pulse low bias, and can explain measurements after last half or full cycle of AC pulse. The model is consistent with the compact model presented in Chap. 4, and can successfully explain the gate insulator process and material dependence for both SiON and HKMG devices, and can also predict long-time DC and AC degradation to determine NBTI lifetime.