Modeling of Advanced Semiconductor Devices

Abstract

Aggressive downscaling of modern semiconductor devices forces development engineers to question the validity of existing modeling approaches. Models for carrier transport have to be considered which are applicable on the transition into the quantum regime. An overview of semiclassical current transport models and their enhancements used for the simulation of nanoelectronic devices is given. Emphasis is put on arising modeling challenges in the existing and future technology nodes. Electron mobility analysis of ultra-scaled, strained field-effect transistors is presented in detail.