Abstract

Integrate-and-fire (IAF) and leaky integrate-and-fire (LIF) models are the popular models for spiking neurons and spiking neuron networks (SNN). They lack the dynamic properties of the ordinary differential equations (ODEs) model but are simpler. More than half of all neuron implementations were digital circuits. The majority of them were IAF and LIF models. The resonate-and-fire (RAF) model proposed by Izhikevich has both simplicity and dynamic properties. However, the RAF model does not have general structures for hardware implementation. Most realizations of the RAF neuron models were analog designs. In this study, we developed and simulated the model’s equations with digital pulses. Based on this analysis, we proposed block models of digital and all-digital RAF neurons to turn the models into digital hardware. We verified the properties of the proposed models by implementing an all-digital RAF neuron on a Intel 28 nm Cyclone V Field-programmable gate array (FPGA) device. The register-transfer level (RTL) structure of the implementation consumed fewer resources, with just 23 D flip-flops, without floating-point operations or multipliers.

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