Abstract
Mobile applications necessitate nowadays huge digital resources. Power management of digital circuits is based on dynamic strategies to preserve energy. DC/DC converters used to supply the digital core face stringent constraints with respect to load transients. Sliding-mode control is well suited to control buck converters that are subject to high dynamic load and line transients. Fixed frequency sliding-mode control has been experimented. Transient performances or silicon area are negatively affected. A new analog implementation of the sliding-mode control with switching frequency control is presented here. The proposed synchronization scheme does not degrade the intrinsic asynchronous transient performances and is not affected by a significant silicon area penalty. The proposed DC/DC converter is implemented in CMOS 130 nm. The switching frequency is kept constant thanks to the frequency regulation loop. The demonstrator achieves more than 80% efficiency from 3mW to 840mW.
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