Abstract
Design and optimization of frequency multipliers for millimeter and submillimeter wavelengths have been previously performed using harmonic-balance techniques together with equivalent circuit models. Using this approach it is difficult to simultaneously design and optimize the diode device and the multiplier circuit. This work demonstrates results from numerical semiconductor simulation coupled with the harmonic-balance technique. The good agreement between the calculated and published experimental data for the output power and efficiency is essentially due to the incorporation of impact ionization in the numerical model. Details on the device behavior and circuit operation at different power levels are provided.
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