Model-Based Parallelizer for Embedded Control Systems on Single-ISA Heterogeneous Multicore Processors

Abstract

This paper presents a model-based parallelization approach for embedded systems on single instruction set architecture (ISA) heterogeneous multicore processors, wherein the core assignment of Simulink blocks is determined based on the control design constraints and characteristics of single-ISA heterogeneous multicore processors. The proposed method first groups blocks hierarchically and forms tens of top-level clusters that contain blocks of the same attribute. For these clusters, a mixed-integer linear programming (MILP) formulation determines the core assignment solution considering load balancing and minimization of inter-core communication across cores with different performance. Finally, each top-level cluster is assigned to cores on multicore processors based on the core assignment solution from the MILP formulation and expanded to the block level by the block dependency. We evaluate the proposed approach by generating parallel code on a single-ISA heterogeneous multicore processor to determine its effectiveness.