Abstract

This paper introduces a combination of models and proofs for optimal power management via clock frequency scaling. The approach is suitable for systems on a chip or microcontrollers where a processor runs in parallel with embedded peripherals. Since the methodology is based on clock rate control, it is very easy to implement. A hardware model, a computational model and an energy model underlie the procedure. We proved that the combination of models is sufficient to determine an optimal clock rate for the CPU. Furthermore, we expand the application space taking into account preemption of tasks. Also, we discuss the role of embedded peripherals when select the clock frequency in both active and power-saving modes. Simulation results manifest the benefits of clock rate control under the proposed methodology. An example shows a 56% increase of the battery lifetime when the clock rate is changed from the lowest possible level to the optimal value.

Highlights

  • Power consumption is an important design metric for battery-powered embedded systems

  • This paper presents a methodology for optimal power management of real-time embedded systems

  • The power consumption is controlled via clock frequency scaling

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Summary

INTRODUCTION

Power consumption is an important design metric for battery-powered embedded systems. Dynamic power is proportional to the clock frequency and the square of the supply voltage. Since the multiple islands are clocked at different rates, the power consumption can be reduced significantly without compromising the system performance. Dynamic supply voltage scaling (DVS) is another power reduction technique [8, 9]. DVS exploits slack time by reducing simultaneously clock frequency and supply voltage. DVS adapts the performance to the actual requirements of the system In this way, substantial savings are achieved since the power consumption is proportional to the square of the supply voltage. Clock frequency scaling and DVS are independent of the previously discussed methods and can be applied at a higher level of abstraction to further improve the energy efficiency. Along with its independent application, it is an integrated part of the supply voltage scaling as well

RELATED WORK
HARDWARE PLATFORM
COMPUTATIONAL MODEL
DD Active mode
ENERGY MODEL
CLOCK RATE CONTROL
EMBEDDED PERIPHERALS
Findings
CONCLUSION
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