Abstract
The foundation of hardware verification is that an implementation satisfies its specification. The specification described by a natural language may be ambiguous and inconsistence. The Acclellera Property Specification Language (PSL) is developed for the formal specification of hardware. It provides a standard means of specifying design properties using a concise syntax with clearly-defined formal semantics, particularly it offers an input method for dynamic (simulation) and static (formal verification method, such as model checking) verification tools. This paper proposes how to use model checking to verify a property with X value, and gives a model checking algorithm based on 3-valued (true, false, X) logic formula of PSL. This algorithm has the same time complexity as 2-valued logic model checking. Finally, we present how to separate CTL formula from a PSL verification unit, and verify these properties from PSL under the given model.
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