Model and analysis of the data readout architecture for the ITS3 ALICE Inner Tracker System

Abstract

The ALICE collaboration is developing the Inner Tracker System 3 (ITS3), a novel detector that exploits the stitching technique to construct single-die monolithic pixel sensors of up-to 266 mm × 93 mm. ITS3 requires all hits from a particle flux of 5.75 MHz/cm2 to be transmitted on-chip to one of the sensor edges. This on-chip readout must balance the resources of power consumption, dead area, and readout performance by tuning different design parameters such as on-chip memories or on-chip links bandwidth. For doing so, a model of the ITS3 on-chip readout architecture will be presented. This model combines an accurate simulation of the particle flux fluctuations expected in ALICE with a clock-accurate digital readout simulator, combining high accuracy with fast code in terms of simulation speed.