Abstract

Metal oxides (e.g. In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , InZnO) have demonstrated mobility an order of magnitude higher than a-Si, which makes them excellent candidates for display applications [1] . One common practice to achieve higher mobility in metal oxide thin-film transistors (TFTs) is to use high-κ gate dielectrics [2] . We have recently explored this phenomenon with a systematic study which found that the observed `mobility enhancement' in metal oxides on high-κ dielectrics is due in large part to the increased gate capacitance, which increases carrier concentration in the channel [4] . However, the interfaces also play a significant role, and in some cases a poor-quality interface offsets the benefits of the higher gate capacitance. In this work, we compare two different metal oxide semiconductors - nanocrystalline In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and sol-gel indium zinc oxide (IZO) - to show that these conclusions are consistent across different semiconductor materials. We continue to investigate the charge transport with high-κ dielectrics by introducing an interfacial SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> layer between the high-κ dielectric and the IZO channel.

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