Abstract
This paper reports on an advanced mixed-mode circuit simulation in which circuit-level switching simulations are performed and the semiconductor equations are solved consistently with circuit equations. As a demonstration, mixed-mode circuit simulation was used to study the dynamics of unclamped-inductive switching (UIS) of a scaled vertical power MOSFET structure. The parasitic bipolar transistor parameters, including the p-base charge and area were varied to study the effect of bipolar turn-on on the UIS switching characteristics and to optimize the device design for maximum UIS avalanche current capability. The simulation results are shown to be in excellent agreement with the measured data. Experimental data was obtained for scaled power MOSFETs fabricated using refractory metal/silicide source and gate contact technology. >
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