Mixed-Signal Physically Unclonable Function With CMOS Capacitive Cells

Kamal Y Kamal,Radu Muresan

doi:10.1109/access.2019.2938729

Kamal Y Kamal, Radu Muresan

Open Access

https://doi.org/10.1109/access.2019.2938729

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Abstract

An electronic physically unclonable function usually includes an on-chip error-correcting code unit, which is vulnerable to security attacks and adds area, power, and data processing time overheads. This paper proposes a mixed-signal physically unclonable function circuit for authentication purposes, which we call the enhanced capacitive physically unclonable function. It divides the input challenge word over multiple computational groups to decrease processing time, increase security, and eliminate the need for error-correcting code units. Most of the challenge bits control capacitive networks grouped into several capacitive cells, while some are analogized through two digital-to-analog converters. One digital-to-analog converter controls the discharge loads of the capacitive cells; the other controls the reference voltage of comparator units. Each comparator controls a counter that digitizes the discharge time into a response chunk. Most of these counters operate at high frequencies for more precise time-to-digital conversion and are overflown to act as roulettes to promote unpredictability. One counter is not overflown to generate a reference response chunk to support error handling. The design allows for more intrinsic variations throughout the fabrication process, leading to unique response chunks. It applies an expanding challenge-response pair approach, generating a 128-bit response word for a 64-bit challenge word. The capacitive nature of the design supports various security features. Simulating the circuit using 45 nm complementary metal-oxide semiconductor technology resulted in an average power of 921.67 μW, a layout area of 22,470 μm 2 , and an average data processing time of 118 μs.

Highlights

Contactless smart cards, machine-readable documents, antitheft tags on books and drugs, and electronic keys for doors, which are known as proximity cards, are among the applications of radio frequency identification (RFID) systems which are vulnerable to physical cloning attacks [1]–[4]
To determine the maximum time which a microcontroller should wait before reading the response chunk (RC), the longest discharge time was determined using Monte Carlo simulation for the total intrinsic variations of 100 chip samples
In this article, various design, layout, and manufacturing aspects were discussed in order to acquire more intrinsic variations throughout a MOSFET-based manufacturing process to form distinctive properties for a MOSFET-based physically unclonable function (PUF) chip

Summary

Introduction

Contactless smart cards, machine-readable documents, antitheft tags on books and drugs, and electronic keys for doors, which are known as proximity cards, are among the applications of radio frequency identification (RFID) systems which are vulnerable to physical cloning attacks [1]–[4]. PUF systems are required to work under various environmental conditions; PUFs are usually tested under various temperatures and voltages Such temporary variations can cause faulty responses, which decrease the reliability of PUFs [11]. The use of an ECC does not always guarantee that all faulty bits can be corrected, and some PUFs contain a detection unit to flag nonstable response bits to omit them from the challenge-response pair (CRP) list during the enrollment phase [24] The general concept of electronic PUFs is based on measuring the unique output response to an input challenge applied through a physical function. In electronic PUFs, the response methodology is based on one or more properties of the devices within the physical function, such as transistor threshold voltage, current, or delay

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