Mixed logic and analog implementation of large neighbourhood cloning templates for CNNs

Abstract

An approach to the implementation of large neighbourhood (r>1) cloning templates in cellular neural networks (CNNs) is presented while the number of interconnections and the circuit complexity are preserved at a level which is practical for existing VLSI technology. The proposed method employs mixed pass transistors logic and analog circuitry to implement r>1 CNNs. Simulation results are presented to confirm the viability of the proposed methods.