Mitigating Heavy Ion Irradiation‐Induced Degradation in p‐type SnO Thin‐Film Transistors at Room Temperature

Abstract

The study investigates the mitigation of radiation damage on p‐type SnO thin‐film transistors (TFTs) with a fast, room‐temperature annealing process. Atomic layer deposition is utilized to fabricate bottom‐gate TFTs of high‐quality p‐type SnO layers. After 2.8 MeV Au4+ irradiation at a fluence level of 5.2 × 1012 ions cm−2, the output drain current and on/off current ratio (Ion/Ioff) decrease by more than one order of magnitude, field‐effect mobility (μFE) reduces more than four times, and subthreshold swing (SS) increases more than four times along with a negative shift in threshold voltage. The observed degradation is attributed to increased surface roughness and defect density, as confirmed by scanning electron microscopy (SEM), high‐resolution micro‐Raman, and transmission electron microscopy (TEM) with geometric phase analysis (GPA). A technique is demonstrated to recover the device performance at room temperature and in less than a minute, using the electron wind force (EWF) obtained from low‐duty‐cycle high‐density pulsed current. At a pulsed current density of 4.0 × 105 A cm−2, approximately four times increase in Ion/Ioff is observed, 41% increase in μFE, and 20% decrease in the SS of the irradiated TFTs, suggesting effectiveness of the new annealing technique.