MIS or MS? Source/drain contact scheme evaluation for 7nm Si CMOS technology and beyond

Abstract

Contact resistance at the transistor source/drain becomes a bottleneck for modern Si CMOS technology. To seek for contact solutions, this paper compares metal-insulator-semiconductor (MIS) contacts and metal-semiconductor (MS) direct contacts in terms of contact resistivity and CMOS compatibility. On p-type substrates, due to the favorable surface Fermi level pinning, MS contact has absolute advantage over MIS. On n-type substrates, on the one hand, we find MIS contacts have relatively high contact resistivity despite the low Schottky barrier height; the low thermal stability of MIS is also worrying. On the other hand, with MS contacts, we use a pre-amorphization based Ti silicidation technique and achieve contact resistivity of 1.5×10−9 Ω·cm2. Therefore, for both NMOS and PMOS, we confirm that MS contacts are still the prevailing contact scheme. Advanced MS interface engineering is able to help reach the target contact resistivity required by advanced CMOS technology.