Minimum-Area Sequential Budgeting for FPGA

Abstract

The constraint-based approach to timing-driven placementrequires delay budgeting to define the delay upper bounds for nets.While most of the previous delay-budgeting works have beenfocused on optimizing combinational circuits, the work in [Delay Budgeting in Sequential Circuit with Application On FPGA Placement]introduces sequential budgeting, which combines budgeting andretiming to optimize sequential circuits better. However, theformulation in [Delay Budgeting in Sequential Circuit with Application On FPGA Placement] does not consider flip-flop (FF) minimization,which is important in practical applications. Here, we propose anew sequential budgeting algorithm, C-SBGT, that not onlycontrols the FF count, but also can be solved more efficientlycompared to [Delay Budgeting in Sequential Circuit with Application On FPGA Placement]. Our formulation has fewer constraints than [Delay Budgeting in Sequential Circuit with Application On FPGA Placement] and the procedure to realize retiming is also simpler. Ourexperiments show that our new min-area sequential budgetingalgorithm produces a good trade-off between the area andbudgeting optimization goals, as well as improving the timingof previous sequential budgeting method by 12%.