Minimum fault covering in reconfigurable arrays

Abstract

One way to increase the yeild in chip production is to place redundant elements on the chips and use these redundant elements to replace the defective elements after the chips are fabricated. It is desirable that as few redundant elements are used for replacement as possible since the cost to reconfigure a chip is proportional to the number of redundant elements used. This paper discusses the case in which the redundant elements are arranged in the form of spare rows and spare columns for a rectangular array. Redundant RAMs are examples of such case. A covering is a set of rows and columns that contain all the defective elements in the array. Replacing the rows and columns in the covering with spare rows and columns will then repair the chip. We introduce the notion of a critical set which is a maximum set of rows and columns that must be included in any minimum covering. We show that for a given pattern of defective elements the corresponding critical set is unique. We also present a polynomial-time algorithm for finding the critical set, and demonstrate how the concept of critical sets can be applied to solve a number of fault covering problems.