Minimizing Device Variation Caused by RTA Temperature Variation Across the Shot Field

Abstract

Spike Rapid Thermal Annealing (RTA) is commonly used method for source and drain dopant activation in 65nm CMOS technology. It is found that the Idsat variation is very sensitive to RTA temperature. To better control the Idsat uniformity across the shot, a systematic study on STI and poly pattern density distribution across the shot field and their effects on the RTA temperature was carried out. It was demonstrated that the STI and poly pattern density variation across the field will result in more than 10ºC RTA temperature variation. To minimize the effect, an optimization of RTA ramp rate and peak temperature was studied. Source/drain (S/D) extension and S/D implant optimization has also been done for the reduction of PMOS device Idsat temperature sensitivity