Abstract

Gate turnoffs (GTOs) are usually used in high-power current source converters (CSCs), i.e., rectifiers and inverters. Space vector modulation (SVM) technique for CSC is established by dividing ac-side line current cycle into six sectors. Each sector is divided into a certain number of SV cycles. SV cycle is divided into three states: two active and one zero state. For low switching frequency as required by GTOs, the SVM technique generates fifth and seventh harmonics (HD5-7) in the CSC ac-side current. Minimal reduction in HD5-7 was achieved with certain states sequence inside the SV cycle. Moderate reduction in HD5-7 was obtained by calculating states on -times at once in the middle of each SV cycle. In this paper, larger reduction in HD5-7 at CSC ac-side current is achieved by new techniques for calculating states on-times. First, two straightforward techniques are proposed. One calculates states on-times from SVM equations in the middle of each state on-time. The other calculates all states on -times when the state changes from one active state to the other. Both techniques are effective in reducing HD5-7. Then, minimum harmonics tracking (MHT) technique for calculating states on-times in SVM CSC is proposed. Tracking technique adjusts states on-times once per four ac-side line current cycles to give the least HD5-7. In CSC with a large overlap period, power factor affects HD5-7, so two-variables MHT technique for both active states on-times inside SV cycle is proposed to give the least HD5-7. Also, a variable perturbation tracking technique is proposed to reduce transient time with unperturbed steady-state operation. Finally, experimental investigations and obstacles are introduced.

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