Abstract
We report a method for minimization of the surface leakage current and reduction of the time-dependent degradation of (Cd,Mn)Te, a material under consideration for semiconductor X-ray and Gamma-ray detector applications. Preliminary characterization of the resistivity of the plates was achieved by use of an EU-ρ-μτ-SCAN. For semi-insulating samples the resistivity was in the range 108–109 Ω-cm. Electrical contacts were made on the lower and upper surfaces of each sample. After protection of the contacts, lateral surfaces were subjected to reaction with a variety of chemical substances. Subsequent chemical treatments of (Cd,Mn)Te single crystal platelets were studied to optimize passivation of the inter-electrode surfaces. The control voltage–current (I–V) characteristics were measured repeatedly at hourly and daily intervals. It was found that chemical etching in 10%Br-MeOH, then 1%Br-MeOH, and finally passivating the surfaces of the crystals with (NH4)2S reduces the surface leakage current.
Highlights
Semi-insulating (Cd,Mn)Te crystals were grown by use of a vertical Bridgman method. (Cd,Mn)Te is a p-type semiconductor with low resistivity because Cd vacancies, which act as acceptor centers, are produced when Cd atoms escape during the growth process.[1]
We annealed samples in Cd to reduce the concentration of acceptors and to improve the overall quality of the crystal by reducing the number of second-phase defects and inhomogeneities.[2]
The material’s resistivity was mapped by a contactless method, by use of an EU-q-SCAN; it was in the range 108–109 X-cm. (Received November 15, 2014; accepted April 30, 2015; published online May 20, 2015)
Summary
Semi-insulating (Cd,Mn)Te crystals were grown by use of a vertical Bridgman method. (Cd,Mn)Te is a p-type semiconductor with low resistivity because Cd vacancies, which act as acceptor centers, are produced when Cd atoms escape during the growth process.[1]. Semi-insulating (Cd,Mn)Te crystals were grown by use of a vertical Bridgman method. (Cd,Mn)Te is a p-type semiconductor with low resistivity because Cd vacancies, which act as acceptor centers, are produced when Cd atoms escape during the growth process.[1] To increase crystal resistivity, we compensated for the free holes by doping with indium. Samples cut from (Cd,Mn)Te crystal were used for the investigation. The size of the platelets was 5 9 5 9 2 mm[3]. We annealed samples in Cd to reduce the concentration of acceptors and to improve the overall quality of the crystal by reducing the number of second-phase defects and inhomogeneities.[2] The material’s resistivity was mapped by a contactless method, by use of an EU-q-SCAN; it was in the range 108–109 X-cm. (Received November 15, 2014; accepted April 30, 2015; published online May 20, 2015)
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
