Abstract
Background/Objectives: Low power modulators are most efficient for wireless communication. Quadrature Amplitude Modulation (QAM) is used widely for high data rate communication than BPSK and QPSK, since it carries more bits of information per symbol over the channel. The objective of this work is to minimize the power consumption and area utilization of 32-bit QAM modulator. Methods/Statistical analysis: In this work, three new procedures are introduced for 32QAM modulator. In the first approach, sine and cosine data generated using conventional technique are stored in ROM and the stored data is selected based on the input sequence to generate the output signal. This approach reduces the power consumption and area utilization. In the second approach, information bit stream is modulated with sine and cosine waves generated by iterative algorithm to minimize power and area requirement. In the third approach, booth multiplication algorithm is employed to generate QAM signal. This method of generating QAM signal consumes less power and area in comparison with the conventional modulator. The work is synthesized, analyzed, and compared in 180nm, 90nm and 45nm CMOS technology using Cadence software. Findings: In 180nm CMOS technology power consumption noticed is 60662.740nW, 617020.071nW and 133679.687nW with the proposed method1, method2 and method3 respectively. An Area utilized in 180nm CMOS technology is 1341mm2, 20746.757mm2, and 2754mm2 respectively in proposed 32QAM modulator with ROM, 32QAM modulator with proposed Iterative algorithm and 32QAM modulator with Booth multiplication algorithm. Novelty/Applications: The conventional 32QAM devours additional power and area. In this work area and power reduction is achieved with respect to the conventional method. The same work is carried out with 90nm and 45nm CMOS technology. Three novel approaches to 32QAM are proposed. The proposed work is synthesized, analyzed, tabulated and compared with conventional method and shown that power consumption and area utilization are minimum than compared to the conventional method. Keywords: QAM; multiplier; power; area; communication; cadence
Highlights
Wireless networks are rapidly developing as an imperative advancement and turning in to a fundamental segment of contemporary day by day life
Three new approaches are projected to 32 bit Quadrature Amplitude Modulation (QAM) modulator to achieve low power consumption and area reduction
The analysis with respect to power and area utilization is carried out using Cadence software
Summary
Wireless networks are rapidly developing as an imperative advancement and turning in to a fundamental segment of contemporary day by day life. QPSK and QAM techniques are used to increase the capability and speed of wireless networks. Information rate adaptability is maintained between channel considerations and modulation rate. If good signal to noise ratio is attainable, higher order modulation is employed to achieve higher data rate at higher speed. QAM can be employed in various mobile radio and quality information delivery appliances. Direct to home (DTH), cable television applications transmit more information signals over the channel. This kind of application utilizes higher order modulation such as 64QAM and 256 QAM. Even though higher order modulators are proficient to provide high speed information signal pace and these are perceptibly minimum reluctant to distortion. Even though higher order modulators are proficient to provide high speed information signal pace and these are perceptibly minimum reluctant to distortion. (5–8)
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