Abstract
This paper presents the improvement of the flash lamp annealing (FLA) process to achieve the ultra-shallow junction (USJ) requirement for high-performance CMOSFETs. Issues concerning ultra-rapid activation are discussed; namely, crystal damage (residual defect, deformation and crack) and pattern dependence, We report that the FLA process with long pulse duration and cap layers can improve USJ characteristics for various design-scale cells.
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