Abstract

Phased-array systems, a special case of multiple-input-multiple-output (MIMO) systems, take advantage of spatial directivity and array gain to increase spectral efficiency. Implementing a phased-array system at high frequency in a commercial silicon process technology presents several challenges. This thesis focuses on the architectural and circuit-level trade-offs involved in the design of the silicon-based fully integrated phased-array transmitters. As the first implementation, a four-element 24GHz 0.18µm CMOS phased-array transmitter with integrated power amplifiers is presented. On-chip power amplifiers use substrate-shielded slow-wave transmission lines for impedance matching and can generate up to 14dBm of output power. The transmitter employs a two-step upconversion architecture with 4.8GHz as the intermediate frequency (IF) and uses a single 19.2GHz synthesizer serving as the local oscillator (LO) generator. The phased-array, employing the LO phase shifting architecture, achieves 23dB of peak to null-ratio when all four elements are used, demonstrates a beam steering range covering all signal incident angles, and can support a data rate of 500Mbps with a quadrature phase-shift keying (QPSK) baseband signal. As the second implementation with a modified phase shifting architecture, an integrated 4-element 77GHz Silicon-Germanium (SiGe) phased-array transceiver is presented. Two-step conversion, envisioning a dual-mode 77GHz/24GHz operation, is used at both the receiver and the transmitter paths. A differential phase of 52GHz is generated by the on-chip voltage-controlled oscillator (VCO) and is distributed to all radio frequency (RF) paths. The phase shifting is performed at the LO ports of the RF mixers with continuous analog phase shifters. The quadrature signal of the second LO, at the IF frequency of 26GHz, is generated by dividing the VCO frequency by a factor of 2 using a cross-coupled injection-locked frequency divider. The on-chip 77GHz power amplifier with an output power of 17.5dBm and peak power added efficiency (PAE) of 14% achieves the best performance demonstrated in silicon. A single transmitter path achieves a 40dB conversion gain at 77GHz with 2.5GHz of bandwidth and a maximum output power of 12.5 dBm. The measured results demonstrate the feasibility of using silicon-based integrated phased-arrays for wireless communication and vehicular radar applications.

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