Abstract

The bandpass characteristic required for wide instantaneous bandwidth microwave components for phased arrays is described. One of the primary error considerations in the bandpass characteristic is the error effect on a compressed, frequency-chirped signal, the errors producing spurious time sidelobes and pulse broadening. Following this the design and performance of five types of microwave components or subsystems, operating over a 10 percent bandwidth, are discussed. These descriptions are of 1) tunnel diode amplifier, 2) microwave switching matrix, 3) subarray corporate feed, 4) ferrite phase shifter, and 5) time delayer for subarray steering. The tunnel diode amplifier (TDA) is of low-cost design, has 15 dB gain, 5.6 dB noise figure, and measurements of 100 amplifiers show standard deviations of insertion phase and gain of 5 degrees and 0.3 dB, respectively. The microwave switching matrix is constructed from ferrite, latching, TEM switches. A path through the matrix consists of 18 switches and has periodic gain and phase errors of 0.3 dB and 3 degrees, maximum. Path-to-path gain variations have a one sigma amplitude variation of 0.18 dB and a one sigma phase variation of 6.8 degrees. High-performance, low-cost ferrite switches were developed for the switching matrix and the nonreciprocal property of the switches has been shown to produce enhanced performance over reciprocal diode switches. The subarray corporate feed is of high-power waveguide-type construction and contains hybrid power dividers throughout to minimize reflection effects. The feed consists of two major subassemblies, each of which is entirely dip-brazed. The insertion phase and amplitude errors of the feed are 10 degrees and ±0.2 dB, maximum. The total insertion loss is 0.5 dB. The ferrite phase shifter is a wide-band design which will handle 65 kW peak power and 400 W average. The design employs a ferrite toroid in waveguide and the driver is analog and latching. The phase shifter has constant phase shift over the band; insertion loss is approximately 1.1 dB and is virtually free from higher-mode resonance loss peaks. Three system configuration of time delayers are considered. The design and performance of a 5-bit time delayer employing ferrite, latching TEM switches is described. The time delayer will handle an input power of 10 kW peak and 100 W average. Phase and amplitude errors through the time delayer are ±3 degrees and 0.5 dB, maximum.

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