Microstructural Properties of Helium Implanted Void Layers in Silicon as Related to Front‐Side Gettering

Abstract

A new gettering concept employs helium (He) ion implantation and low temperature annealing to form a void layer below the surface of the silicon. The surface of the void walls contains many dangling bonds that are highly reactive. Once formed many of the voids grow and facet indicating a low energy configuration. The threshold He dose for void stability is observed at 1 × 1016 He/cm2, while dislocation stability and retention within the void layer is not observed until 3 × 1016 He/cm2. The gas ambient used during low temperature anneals as well as wet vs. dry oxidation processes have a strong influence on the dislocations associated with the voids. Similarly the use of an in situ etch during epitaxial silicon growth is destructive, while the bake at the same temperature shows no detrimental effects on the dislocations. Voids and dislocations are stable at temperatures as high as 1453 K that are used in epitaxial processing, and also are compatible with standard oxidation processes. Evidence suggests that hydrogen diffuses into the voids and passivates them during wet oxidation. This can be reversed by a dry oxidation at 1073 K. Interstitial oxygen is observed to diffuse and partially passivate voids during the initial oxidation steps. Higher He doses ⩾3 × 1016 He/cm2 show good void and dislocation stability with all dislocations confined to the void layer. Heavily doped n+ silicon shows greater variations in microstructure than p+ or lightly doped silicon. This study evaluates the high temperature stability of the void microstructure formed during wet and dry oxidation processes together with silicon epitaxial growth at different temperatures. Dislocation behavior pertinent to the use of voids for gettering is also discussed. A preliminary discussion of void electrical charging by available dangling bonds is presented for lightly doped and heavily doped n‐type silicon.