Abstract
Three-dimensional (3D) CMOS technology encourages the use of UV laser annealing (UV-LA) because the shallow absorption of UV light into materials and the process timescale typically from nanoseconds (ns) to microseconds (μs) strongly limit the vertical heat diffusion. In this work, μs UV-LA solid phase epitaxial regrowth demonstrated an active carrier concentration surpassing 1 × 1021 at cm−3 in an arsenic ion-implanted silicon-on-insulator substrate. After the subsequent ns UV-LA known for improving CMOS interconnect, only a slight (∼5%) sheet resistance increase was observed. The results open a possibility to integrate UV-LA at different stages of 3D-stacked CMOS.
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