Abstract
An experimental 2.4GHz CMOS radio composed of RF and digital circuits for the low power and low rate IEEE802.15.4 WPAN is reported, consuming 21mW in receiver and 30mW in transmitter. The RF design focus is to maximize linearity per power using linearization methods, which lead an order of improvement in LNA/Mixer IIP3/power performance. Chip-on-PCB technology allows implementation of small size radio at very low cost, which also provides 3dBi gain patch antenna and high Q (>50) inductors. This receiver has -82dBm sensitivity and -4dBm IIP3.1.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
