Abstract

The paper presents a synthesis method that allows reduction of the number of look-up table (LUT) elements in logic circuits of compositional microprogram control units (CMCU) with code sharing. The method is mainly targeted for field-programmable gate arrays (FPGA) with embedded-memory blocks (EMB) but can be also used in case of Complex Programmable Logic Devices (CPLD). The main idea of the method is to use classes of pseudoequivalent operational linear chains, stored in control memory of the unit, to save LUT elements. The article contains conditions for application of the method, example of design and results of synthesis in Xilinx ISE.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call