Micronmesh for fault-tolerant GALS Multiprocessors on FPGA

Abstract

System-on-Chip (SoC) circuits have evolved to single chip Multiprocessor systems. Due to increasing variance of process parameters, which produces synchronization problems on large SoCs, a globally-asynchronous locally-synchronous (GALS) design style must have been mobilized. In addition, the large VLSI circuits are also becoming more susceptible to transient and intermittent faults which can corrupt their operation. This paper presents a new micronmesh network-on-chip (NoC) which is targeted to fault-tolerant communication of GALS Multiprocessor SoCs (MPSoC). It is fully synthesizable with current design tools and it can be used for prototyping MPSoCs on FPGA circuits. The Micronmesh incorporates a new improved fault-diagnosis-and-repair (FDAR) system which is able to diagnose and repair also buffer memories in addition to wire connections while fault-tolerant DOR (FTDOR) routing is used for routing packets to their destinations around defected parts. Owing to the FDAR system and the FTDOR Micronmesh degrades gracefully as permanent faults appear and it is able to recover from transient and intermittent faults. The fault-tolerance of the Micronmesh is also improved by switch-to-switch (S2S) level retransmissions which reduce the number of end-to-end (E2E) level retransmissions that produce considerably higher latencies. These methods targeted at improving the fault-tolerance are also becoming necessary for improving the manufacturability of the circuits in the future.