Abstract

Thin-film transistors (TFTs) are core elements of novel display media for large-area electronic applications. Microcrystalline-silicon TFTs prepared at low temperatures (150degC - 200degC) have recently gained much attention as potential elements for such applications due to their high charge carrier mobilities exceeding 10 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V middots. Understanding the relationship between structural properties and charge transport is the key in realizing transistors with high charge carrier mobility at low temperatures. In this paper, we investigated the correlation between the structural properties of microcrystalline silicon and the performance of high-mobility microcrystalline-silicon TFTs. Transistors with high electron and hole charge carrier mobilities exceeding 50 and 12 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V middots, respectively, were realized near the transition to the amorphous-growth regime. The results reveal that electronic defects at the grain boundaries of silicon crystallites are passivated by the amorphous phase. The results contradict the commonly believed assumption that the highest charge charier mobility can only be achieved for films with high or very high crystalline-silicon volume fraction. The crystalline volume fraction of the material will be correlated to the device parameters of transistors. Furthermore, the first results of microcrystalline-silicon-TFT-based complementary-metal-oxide-semiconductor inverters with high voltage gains exceeding 22 will be presented.

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