Micro via and line patterning for PCB using imprint technique

Abstract

Abstract Today’s electronic devices such as mobile phones, PDA, computers, etc. have more functions in a smaller size. Thus conducting lines and via holes of PCB (printed circuit board) which has a role of land for all kinds of electronic components are getting finer. In this study, the conducting lines and via holes are produced using thermal imprint technique rather than the conventional photo-lithography process. Imprint technique is a press process that transfers patterns of stamp to resins. Imprint technique is used to produce micro size trench lines and via holes in epoxy resins. Resins used in this work are silica (SiO 2 ) reinforced epoxy. Resins were imprinted using 10 * 10 mm size Ni or polymer stamp. Line/space of pattern is 10/10 μm while diameter of via hole is 30 μm. The depths of lines and via holes are 15 and 30 μm, respectively. The anti-sticking treated stamp and epoxy resins were pressed at 100 °C for 30 min in vacuum. The stamp was released after resins were cured for 1 h at 130 °C. All patterns of stamp were successfully transferred with high fidelity and any noticeable defect was not observed within imprinted area. Imprinted resins were de-smeared to remove the residue at the bottom of via holes and to enhance the adhesion of resins with Cu. Electro/less copper plating was followed to fill in the imprinted patterns. Since the excess Cu layer was formed on the resins during Cu plating, the planarization process was introduced to obtain isolated lines and via holes.