Abstract
Self-Aligned Double Patterning (SADP) scheme is considered as one of the most promising lithographic techniques to meet the challenges for aggressive flash 32 nm semiconductor technology node and beyond. Monitoring the SADP stages implies the necessity to use metrology methods that meet advanced technology nodes requirements. One important growing metrology factor is the Line Edge Roughness (LER). This factor is most relevant due to the unique processing of the outer vs. inner edges in the SADP process. The aim of the present study is to evaluate the right metrics to tightly monitor SADP process, including the roughness behavior of the features on SADP layers, and seek correspondence of LER characteristics between SADP sequential process stages. Additional element of this study will be to examine the performance of CD-SEM roughness analysis on small features, with the usage of improved LER measurement method that takes into account the contribution of SEM imaging noise to the obtained LER values.
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