Methods for Reducing the Activity Switching Factor

Abstract

Multiplexing parallel busses into serial links has been proposed for its advantages such as reducing inter connect area, coupling capacitance and crosstalk. But serialization increases bit transition which increases the activity switching factor and power dissipation. Many coding schemes have been proposed to optimize the activity switching factor which is a result of increased number of bit transitions. This paper compares some of the techniques which are used to reduce the activity switching factor and the power dissipation. This paper gives an overview of the bus invert coding, the weight based bus invert coding, the partial bus invert coding, the serialized low energy transmission coding, the transition inversion coding, and the embedded transition inversion coding. The advantages and disadvantages of each technique are compared and the best among them is found to be embedded transition inversion coding. I. INTRODUCTION With the advancement of technology, continues scaling of silicon technology became popular which made way for system on chip design to be practical. With the advent of technology the use of system on chip design has increased drastically. The system on chip design has gained mass acceptance in the field of large scale design. The system on chip design deals with the integration of millions of transistors into a single chip. The two main constraints for the system on chip design process are the limited area of the chip in which the system have to be implemented and the power dissipation parameter. The designers then had a task ahead them which was to find a trade-off between these factors and come up with an optimized scenario where the area can be reduced along with the power dissipation parameter. They proposed many alternatives for solving the same and one among them was to multiplex parallel busses into serial links. The process of multiplexing parallel busses into serial links deals with the replacement of parallel busses which occupy larger area by serial links. The serialization process reduces inter connect area, coupling capacitance and crosstalk which was a cause of concern in parallel buses. But still there are certain parameters associated with the serialization process like the activity switching factor and the power dissipation that has to be addressed while multiplexing the parallel busses into serial links before it can be implemented in the system on chip design. The activity switching factor and the power dissipation increases during the process of serialization. The activity switching factor tends to increase with the increase in bit transitions. This paper compares some of the most popular techniques developed by various scientists for addressing the increase in activity switching factor and the power dissipation due to the same.