Metastability tests of flip–flops in programmable digital circuits

Abstract

This paper describes the methods and experimental techniques for determination of the metastability behavior of the flip–flops used in the programmable digital circuits. A dual model of the metastability distinguishes two transitions at the flip–flop output (L/H and H/L) which have different impact on the Mean Time Between Failures (MTBF) of the flip–flop. A new circuit of the late transition detector (LTD) allows for determination of the pairs of the metastability parameters, the window W and the time constant τ, for both transitions. The test results are presented for four types of programmable digital circuits fabricated commercially in CMOS technology. In the all tests, the H/L transition clearly dominates with respect to MTBF (as a worse one). The presented test methods can also be used for evaluation of flip–flops in nonprogrammable digital circuits.