Abstract

Lattice-based cryptography (LBC), exploiting learning with error (LWE) problems, is a promising candidate for postquantum cryptography. The number theoretic transform (NTT) is the latency- and energy-dominant process in the computation of LWE problems. This article presents a compact and efficient in-MEmory NTT accelerator, named MeNTT, which explores an optimized computation in and near a 6T SRAM array. Specifically designed peripherals enable fast and efficient modular operations. Moreover, a novel mapping strategy reduces the data flow between the NTT stages into a unique pattern, which greatly simplifies the routing among processing units (i.e., the SRAM column in this work), reducing the energy and area overheads. The accelerator achieves significant latency and energy reductions over prior arts.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call