Abstract
Fault tolerance is one of the main issues of electronic devices especially for controlling and monitoring of the operations in extreme environments. In this letter, a new memristor-based hybrid approach has been proposed, which combines attractive features of the both static and dynamic methods to introduce a new concurrent reconfigurable structure. The simulation results show that the proposed structure tolerates transient and permanent faults during the run-time with minimum delay, power consumption, and area overhead in comparison to the related works. The proposed work also reaches to minimum silicon protection factor with zero pause time during fault recovery phase.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
