Memristor-based pattern matching

Abstract

Pattern matching is a machine learning area that requires high-performance hardware. It has been hypothesized that massively parallel designs, which avoid von Neumann architecture, could provide a significant performance boost. Such designs can advantageously use memristive switches. This paper discusses a two-stage design that implements the induced ordered weighted average (IOWA) method for pattern matching. We outline the circuit structure and discuss how a functioning circuit can be achieved using metal oxide devices. We describe our simulations of memristive circuits and illustrate their performance on a vowel classification task.