Memristive Crossbar-Based Nonvolatile Memory

Abstract

Among several types of emerging memory technologies, memristor-based nonvolatile resistive RAM (ReRAM) is currently being investigated as a promising candidate to potentially replace the popular Flash memories, and even other conventional memories such as SRAM and DRAM. At the architectural level, crossbar cell array structure is considered one of the best ways to implement memristor-based ReRAM. This chapter presents an overview of promising ReRAM technologies, their potential benefits, and the key research challenges, with a focus on reduction/oxidation (Redox)-based RAM. It briefly describes the basic operation principles of memristive memory cells, and presents the memristor-based crossbar memory architecture to finally focus on the serious negative impact of the current sneak-paths. Then, two possible methodologies are explored as means to deal with the sneak-path problem, concerning (i) novel storage cell structures, and (ii) modifications in the memory architecture. More specifically, (i) anti-parallel memristive switches are studied as potential cross-point elements in ReRAM arrays, in comparison with anti-serial (complementary) memristive switches. A comprehensive and comparative presentation between them is provided, while commenting on their overall performance and the most appropriate switching characteristics that the structural memristors should have, in order to better fit to memory applications. Moreover, (ii) five alternative architectures (topologies) for passive crossbar ReRAM are presented, which are based on the introduction of a certain percentage of insulating nodes spread out inside the array according to specific distribution patterns. Both approaches enable crossbar memory arrays without select devices, thus they simplify the array fabrication process and could be well-suited for future data storage applications. Finally, XbarSim, a GUI-based educational simulation tool aiming to serve students/researchers who wish to explore and study the memristive crossbar circuit architecture, is presented.