Memory-Optimized Re-Gridding Architecture for Non-Uniform Fast Fourier Transform

Abstract

This paper proposes a power-efficient and memory-optimized FPGA-based solution for the memory and compute-intense re-gridding process used in implementing Non-uniform Fast Fourier Transform (NuFFT) algorithm. Re-gridding refers to mapping non-equispaced sampled data onto a uniform grid using an interpolation kernel function. Re-gridding is the most time-consuming step in the entire NuFFT computation. The proposed solution is based on better utilization of FPGA resources and minimizing the number of accesses to the external memory. We demonstrate high performance over a wide range of configurations and data-sizes. This paper targets a generic solution to arbitrary sampling trajectories and gives trajectory specific solutions for some well-known trajectories in NuFFT applications, such as magnetic resonance imaging and synthetic aperture radar. Compared with existing solutions, throughput is improved by over 9.6 when compared with the existing FPGA-based techniques, whereas computational power efficiency (in terms of MFLOPS/Watt) is improved by over 15 times. Compared with GPU-based technique, 9.59 times higher MFLOPS per watts are achieved. The proposed architecture is implemented using hardware description language as well as high-level synthesis (HLS)-based OpenCL framework and the comparison is reported. Hence, this paper also serves as a reference for the comparison of HLS-based solutions against optimized HDLs. Accuracy of the re-gridding process is also reported in terms of signal-to-noise ratio.