Abstract
The key problem in a parallel system is how to distribute the work load to the components of the system in order to get optimal resource utilization, maximize throughput, and minimize response time. The sliding-window (SW) switch is a highly parallel architecture that uses an array of memory-modules to store and process data packets in high speed-networks and Internets. In this paper, we study two key aspects in the design of a high-speed router/switch using the SW switch architecture. The effect of the memory-configuration and the memory-bandwidth in the performance of the SW switch architecture is investigated under bursty-traffic conditions.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
