Memory Management and Communication on Homogeneous and Heterogeneous Parallel systems

Abstract

Abstract This paper reports a study held on the inter-processor communication performance of homogeneous and heterogeneous parallel systems when different data structure allocation schemes are implemented, regarding internal and/or external processor memory. To evaluate the performance parameters some case-study algorithms were implemented on homogeneous and heterogeneous architectures. Due to algorithm-machine dependency, hardware and software features have to be considered. Where the access to external memory is not efficient, some internal memory buffering methods are analysed. A comparison of the results obtained is presented, enabling establishment of memory management references, regarding the parallel architectures employed.