Memory address allocation method for a indirect addressing DSP with consideration of modification in local computational order

Abstract

For DSPs of indirect memory addressing, a novel memory allocation method incorporated with rearrangement in local computational order is presented. At first, a given memory access sequence is translated into a graph notation, where several strategies to handle flexibilities in memory access orders at the computational commutative blocks are introduced. For the derived graph, an efficient memory allocation is determined by the memory allocation method based on the line graph extraction technique. According to the derived memory allocation, computational orders at the local parts are settled, so that the number of overhead codes associated by the corresponding memory accesses is minimized. The proposed methods are applied to the compiler for /spl mu/PD77230 (NEC), and codes generated for several examples show the effectiveness of the proposed methods.