Abstract

As the need of data-intensive (or big data) applications is growing, the exascale system (i.e., capable of executing 1018 operations per second) is desired. However, it is challenging to scale von Neumann architecture to meet this need, due to its unavoidable data movement between processors and memories. To address such a challenge, this paper proposes a local-processing computer architecture (MECRO) based on memristor crossbar, which consists both microarchitecture and instruction set. Differing from von Neumann architecture, MECRO executes all operations locally in the memristor-based memory using stateful logic operations, where the same devices simultaneously serve as both logic and memory. In addition, this paper proposes a new multiplication arithmetic algorithm that is suitable for MECRO. n×n matrix multiplication is used as example of data-intensive applications. MECRO is verified with SPICE simulations in a small scale. Comparing with a von Neumann architecture consisting of p processors, the experiment shows that MECRO is able to improve the execution time in an order of O(n2/p), while using the similar memory (O(n3)).

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.