Mechanism of device degradation in n- and p-channel polysilicon TFTs by electrical stressing

Abstract

The effects of electrical stress on hydrogenated n- and p-channel polysilicon thin-film transistors are discussed. The on-state caused the most significant degradation, whereas off-state and accumulation conditions resulted in negligible degradation. The on-state stress degraded the threshold voltage, trap state density, and subthreshold sharpness of both n- and p-channel devices toward perhydrogenated values, and the rates of degradation increased with stressing biases. The field-effect mobility and leakage current, however, were not degraded by stressing. The mechanism of device degradation may be attributed to the metastable creation of midgap states within the polysilicon channel, as opposed to gate dielectric charge trapping or interface state generation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>