Abstract
Field-Plate (FP) MOSFET structure has field-plate and thick oxide inside each trench. Due to the field-plate effect, it can improve tradeoff between low drift layer resistance and high breakdown voltage. In this structure, silicon wafer warpage is larger than that of conventional structure. It causes various problems in production, for example an error in vacuum adsorption or wafer transportation at manufacturing tools. In order to control the wafer warpage in manufacturing process, it is necessary to understand the wafer warpage peculiar to the FP-MOSFET comprehensively. The wafer warpage of the FP-MOSFET is different in X-/Y-directions because of influence of the stripe trench pattern extending in X-direction. We predict the warpage change in a newly designed FP-MOSFET by TCAD simulation, and study the reason of the warpage peculiar to the FP-MOSFET. Particularly, we explain six significant process steps, in which the warpage is greatly changed. Moreover, three process control techniques to reduce the wafer warpage are stated. This study enabled us to control the wafer warpage in process integration for the FP-MOSFET.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
