Mechanical properties of silicon in subsurface damage layer from nano-grinding studied by atomistic simulation

Zhiwei Zhang,Huiping Yu,Pei Chen,Tong An,Fei Qin

doi:10.1063/1.5021654

Zhiwei Zhang, Huiping Yu + Show 3 more

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https://doi.org/10.1063/1.5021654

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Abstract

Ultra-thin silicon wafer is highly demanded by semi-conductor industry. During wafer thinning process, the grinding technology will inevitably induce damage to the surface and subsurface of silicon wafer. To understand the mechanism of subsurface damage (SSD) layer formation and mechanical properties of SSD layer, atomistic simulation is the effective tool to perform the study, since the SSD layer is in the scale of nanometer and hardly to be separated from underneath undamaged silicon. This paper is devoted to understand the formation of SSD layer, and the difference between mechanical properties of damaged silicon in SSD layer and ideal silicon. With the atomistic model, the nano-grinding process could be performed between a silicon workpiece and diamond tool under different grinding speed. To reach a thinnest SSD layer, nano-grinding speed will be optimized in the range of 50-400 m/s. Mechanical properties of six damaged silicon workpieces with different depths of cut will be studied. The SSD layer from each workpiece will be isolated, and a quasi-static tensile test is simulated to perform on the isolated SSD layer. The obtained stress-strain curve is an illustration of overall mechanical properties of SSD layer. By comparing the stress-strain curves of damaged silicon and ideal silicon, a degradation of Young’s modulus, ultimate tensile strength (UTS), and strain at fracture is observed.

Highlights

Monocrystalline silicon is the most widely used semiconductor materials currently
The travel velocity of diamond tool is pre-set at 150m/s and depth of cut is pre-set at 20 Å
molecular dynamic (MD) simulation of nano-grinding for monocrystalline silicon at nanoscale were performed in this paper

Summary

Introduction

Monocrystalline silicon is the most widely used semiconductor materials currently. As the demand of portable and wearable electronics, the ultra-thin silicon wafer is highly desired by electronic industry. To reduce the thickness of silicon die, the silicon wafer needs to be thinned to the desired thickness before dicing to a single die. Grinding is the most widely used technology to thin silicon wafer. Grinding process will induce unavoidable surface and subsurface damage in ground silicon wafer. When the silicon wafer was ground to less than 10 μm, the damage could cause severe wafer warpage and breakage, and the thickness of subsurface damage layer (SSD) could be from 0.7 to 1.4 μm.[1] To study the role of SSD layer in ground silicon wafer, experimental method is limited. Molecular dynamic (MD) simulation is an effective way to capture the detailed movements of silicon atoms during grinding process, and the atomistic structure of ground silicon To study the role of SSD layer in ground silicon wafer, experimental method is limited. molecular dynamic (MD) simulation is an effective way to capture the detailed movements of silicon atoms during grinding process, and the atomistic structure of ground silicon

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